Computer Organization

Francesco TORTORELLA Computer Organization

0612700011
DIPARTIMENTO DI INGEGNERIA DELL'INFORMAZIONE ED ELETTRICA E MATEMATICA APPLICATA
EQF6
COMPUTER ENGINEERING
2021/2022



OBBLIGATORIO
YEAR OF COURSE 1
YEAR OF DIDACTIC SYSTEM 2017
SECONDO SEMESTRE
CFUHOURSACTIVITY
1CALCOLATORI ELETTRONICI - MOD.1
216LESSONS
18EXERCISES
2CALCOLATORI ELETTRONICI - MOD.2
216LESSONS
18EXERCISES
3CALCOLATORI ELETTRONICI - MOD.3
216LESSONS
18EXERCISES


Objectives
THE COURSE COVERS THE PRINCIPLES OF COMPUTER ORGANIZATION, THE LOW-LEVEL PROGRAMMING MODEL, THE MAIN COMPONENTS OF THE ARCHITECTURES AND THEIR PERFORMANCE MEASURES. IT ALSO INTRODUCES COMBINATORIAL AND SEQUENTIAL NETWORKS USED AS BUILDING BLOCKS OF THE MAIN ARCHITECTURAL COMPONENTS.

KNOWLEDGE AND UNDERSTANDING
PRINCIPLES OF COMPUTER ORGANIZATION AND LOW-LEVEL PROGRAMMING. ARCHITECTURE PERFORMANCE EVALUATION AND THEIR IMPACT ON PROGRAMS PERFORMANCE. ARCHITECTURE AND DESIGN OF COMPUTER COMPONENTS. FUNCTIONS OF BASIC COMBINATORIAL NETWORK (ADDER, MULTIPLEXER, ENCODER, DECODER).

APPLYING KNOWLEDGE AND UNDERSTANDING
ASSEMBLY PROGRAMMING, LOGICAL DESIGN OF THE COMPUTER BASIC BLOCKS. INTEGRATION OF HARDWARE AND SOFTWARE DESIGN.
Prerequisites
THE CLASS REQUIRES KNOWLEDGE OF C PROGRAMMING.
AS A STRICT PREREQUISITE, THE STUDENT MUST HAVE PASSED THE COURSE OF FOUNDATIONS OF PROGRAMMING
Contents
FUNDAMENTAL CONCEPTS (LECTURE / PRACTICE / LABORATORY HOURS 2/0/0)
- VON NEUMANN MODEL
- INSTRUCTION EXECUTION CYCLE
- MIPS PROGRAMMING MODEL

ASSEMBLY LANGUAGE (LECTURE / PRACTICE / LABORATORY HOURS 6/6/0)
- MIPS INSTRUCTION CLASSES
- ADDRESSING MODES
- MIPS DIRECTIVES
- SUBROUTINE MANAGEMENT IN ASSEMBLY
- TRANSLATING HIGH-LEVEL LANGUAGE STATEMENTS INTO ASSEMBLY
- IMPLEMENTING DATA STRUCTURES IN ASSEMBLY

LOGIC SYSTEMS: COMBINATORIAL AND SEQUENTIAL MACHINES (LECTURE / PRACTICE / LABORATORY HOURS 12/12/0)
- GATES, TRUTH TABLES, AND LOGIC EQUATIONS
- COMBINATIONAL LOGIC
- COMBINATIONAL MACHINES (ADDER, MULTIPLEXER, DECODER)
- MEMORY ELEMENTS (LATCHES, FLIP-FLOPS, REGISTERS)
- CLOCK, TIMING METHODOLOGIES

CPU ARCHITECTURE (LECTURE / PRACTICE / LABORATORY HOURS 4/4/0)
- SINGLE CYCLE DATAPATH A CICLO SINGOLO FOR A SUBSET OF MIPS INSTRUCTIONS
- INSTRUCTION EXECUTION ANALYSIS AND ARCHITECTURE EVALUATION

MEMORY HIERACHY (LECTURE / PRACTICE / LABORATORY HOURS 6/6/0)
- WHAT IS A MEMORY HIERARCHY
- DRAM AND SRAM TECHNOLOGIES
- TEMPORAL AND SPATIAL LOCALITY OF REFERENCE
- DIRECT ACCESS CACHE AND SET-ASSOCIATIVE CACHE
- MEMORIA VIRTUALE

INPUT/OUTPUT: INTERFACE AND DRIVER (LECTURE / PRACTICE / LABORATORY HOURS 4/4/0)
- I/O INTERFACES
- MEMORY MAPPED I/O
- PROGRAMMING A DRIVER FOR I/O OPERATIONS
MID-TERM AND FINAL TEST SIMULATION (LECTURE / PRACTICE / LABORATORY HOURS 0/4/0)

TOTAL LECTURE / PRACTICE / LABORATORY HOURS 36/36/0
Teaching Methods
THE COURSE INCLUDES LECTURES AND PRACTICE SESSIONS IN THE CLASSROOM. IN THE PRACTICE SESSIONS STUDENTS ARE GIVEN PROBLEMS TO BE SOLVED UNDER THE TEACHER SUPERVISION. SOME PRACTICE SESSIONS REQUIRE THE USE OF AN ASSEMBLY PROGRAMMING ENVIRONMENT.
Verification of learning
PROFICIENCY IS EVALUATED THROUGH THE INTERMEDIATE AND THE FINAL WRITTEN TESTS AND AN ORAL EXAM. IN EACH WRITTEN TEST STUDENTS ARE REQUIRED TO SOLVE PROBLEMS SIMILAR TO THOSE THAT HAVE BEEN PRESENTED AND DISCUSSED DURING THE PRACTICE.

DURING THE TESTS STUDENTS CAN USE BOOKS AND OTHER SUPPORTING MATERIAL PROVIDED BY THE INSTRUCTORS. OTHER MATERIAL AS WELL AS ELECTRONIC DEVICES FOR DATA STORING AND/OR PROCESSING ARE NOT ALLOWED.

TO EACH PROBLEM IN A TEST IS GIVEN A MAXIMUM SCORE SUCH THAT THEIR SUM ACROSS THE TWO WRITTEN TESTS IS EQUAL TO 30. SCORES ARE GIVEN TAKING INTO ACCOUNT CORRECTNESS, COMPLETENESS AND QUALITY OF THE PROPOSED SOLUTIONS. THE WRITTEN TEST FINAL SCORE IS OBTAINED BY SUMMING UP THE SCORES ASSIGNED TO EACH WRITTEN TEST. THE FINAL GRADE IS THE SUM OF THE SCORES OF THE TESTS (WEIGHTED 80%) AND THE SCORE OBTAINED AT THE ORAL EXAM (WEIGHTED 20%).

STUDENTS MISSING OR FAILING THE INTERMEDIATE TEST WILL BE REQUIRED TO TAKE A FINAL TEST COVERING ALL THE TOPICS.

THE EVALUATION CAN BE CUM LAUDE FOR STUDENTS SHOWING AN OUTSTANDING KNOWLEDGE OF THE TOPICS OF THE COURSE.
Texts
"D.A. PATTERSON AND J.L. HENNESSY, COMPUTER AND ORGANIZATION DESIGN. THE HARDWARE/SOFTWARE INTERFACE. MIPS EDITION, MORGAN-KAUFFMANN, 6TH ED., 2020.

SUPPLEMENTARY TEACHING MATERIAL WILL BE AVAILABLE ON THE UNIVERSITY E-LEARNING PLATFORM (HTTP://ELEARNING.UNISA.IT) ACCESSIBLE TO STUDENTS USING THEIR OWN UNIVERSITY CREDENTIALS."
More Information
THE COURSE IS HELD IN ITALIAN
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