Massimo DE SANTO | ELECTRONIC CALCULATORS
Massimo DE SANTO ELECTRONIC CALCULATORS
cod. 0612400054
ELECTRONIC CALCULATORS
| 0612400054 | |
| DEPARTMENT OF INDUSTRIAL ENGINEERING | |
| EQF6 | |
| ELECTRONIC ENGINEERING | |
| 2025/2026 |
| OBBLIGATORIO | |
| YEAR OF COURSE 3 | |
| YEAR OF DIDACTIC SYSTEM 2018 | |
| SPRING SEMESTER |
| SSD | CFU | HOURS | ACTIVITY | |
|---|---|---|---|---|
| INF/01 | 6 | 60 | LESSONS |
| Objectives | |
|---|---|
| EDUCATIONAL OBJECTIVES. THE COURSE AIMS TO PROVIDE THE METHODOLOGICAL AND OPERATIONAL TOOLS FOR A CLEAR UNDERSTANDING OF MODERN ELECTRONIC COMPUTERS WITH PARTICULAR REFERENCE TO ARCHITECTURAL AND DESIGN ASPECTS AND THE INTERFACE BETWEEN HARDWARE AND SOFTWARE. AFTER A BRIEF INTRODUCTION TO THE DESIGN AND SYNTHESIS OF SEQUENTIAL NETWORKS, THE COURSE USES THE MIPS PROCESSOR TO PRESENT THE FUNDAMENTALS OF HARDWARE TECHNOLOGIES, ASSEMBLY LANGUAGE, DATAPATH AND CONTROL ORGANIZATION, THE PIPELINE APPROACH, MEMORY HIERARCHIES, AND I/O. SUBSEQUENTLY, THE FUNDAMENTALS OF EMBEDDED SYSTEMS DEVELOPMENT ARE PROVIDED. THE COURSE ALSO HAS A PROFESSIONALIZING OBJECTIVE THROUGH THE PROPOSITION OF A DESIGN EXERCISE IN SOM AND SOC EMBEDDED SYSTEMS SIMULATION ENVIRONMENTS. KNOWLEDGE AND UNDERSTANDING SKILLS THE STUDENT AT THE END OF THE COURSE SHOULD BE ABLE TO UNDERSTAND THE VOCABULARY PROPER FOR COMPUTER ARCHITECTURES, EXTRACT FUNCTIONAL SPECIFICATIONS THROUGH REQUIREMENTS ANALYSIS, AND MASTER THE MAIN METHODOLOGIES PRESENT IN THE FIELD APPLIED KNOWLEDGE AND UNDERSTANDING THE STUDENT SHOULD EXHIBIT THE ABILITY TO UNDERSTAND THE MAIN TECHNOLOGIES PRESENT IN THE FIELD OF HARDWARE ARCHITECTURES AND THE LINK BETWEEN HIGH-LEVEL PROGRAMMING AND ITS IMPACT ON THE PHYSICAL MACHINE. AUTONOMY OF JUDGMENT ABILITY TO EVALUATE AND USE THE BASIC ELEMENTS FOR THE DESIGN AND/OR PERFORMANCE EVALUATION OF DIGITAL INFORMATION PROCESSING SYSTEMS AND DEVICES COMMUNICATION SKILLS ABILITY TO COMMUNICATE TO AN AUDIENCE OF SPECIALISTS (AND NON-SPECIALISTS) INFORMATION, IDEAS, PROBLEMS, AND SOLUTIONS IN THE SPECIFIC SUBJECT AREA WITH LANGUAGE PROPERTIES AND GOOD ARTICULATION OF THOUGHT. LEARNING SKILLS ABILITY TO APPLY ACQUIRED KNOWLEDGE TO CONTEXTS DIFFERENT FROM THOSE PRESENTED DURING THE COURSE, AND TO DEEPEN THE TOPICS COVERED USING MATERIALS OTHER THAN THOSE PROPOSED. |
| Prerequisites | |
|---|---|
| Introduction to Computer Science |
| Contents | |
|---|---|
| RECALLS ON COMBINATORIAL AND SEQUENTIAL MACHINES. THEORY 3 HOURS TUTORIAL 2 HOURS ARCHITECTURE OF A COMPUTER SYSTEM. PERFORMANCE OF A COMPUTING SYSTEM. INSTRUCTION SETS AND ADDRESSING MODES. LANGUAGES AND ASSEMBLY PROGRAMMING. THEORY 5 HOURS EXERCISE 5 HOURS PROCESSOR ORGANIZATION AND CONTROL UNITS. ARITHMETIC-LOGIC UNIT. DATAPATH. PIPELINING. THEORY 5 HRS. TUTORIAL 5 HRS. HIERARCHY OF MEMORIES. CACHE MEMORIES. INTERRUPTS AND INPUT/OUTPUT MANAGEMENT. THEORY 3 HOURS DRILL 3 HOURS INTRODUCTION TO EMBEDDED SYSTEMS. SYSTEM-ON-MODULE AND SYSTEM-ON-CHIP APPROACHES. SIMULATION ENVIRONMENTS. THEORY 5 HOURS TUTORIAL 5 HOURS DEVELOPMENT OF AN EMBEDDED SYSTEM DESIGN. THEORY 4 HRS. LAB 15 HRS. |
| Teaching Methods | |
|---|---|
| THE COURSE INCLUDES CLASSROOM LECTURES AIMED AT PRESENTING THEORY AND NUMERICAL EXERCISES TO STRENGTHEN OPERATIONAL SKILLS. EXERCISES ASSIGNED TO STUDENTS ARE SOLVED IN CLASS BY THE INSTRUCTOR USING THE TECHNIQUES PRESENTED IN THE THEORY LECTURES. THE EXERCISES ARE GUIDED BY THE LECTURER TO DEVELOP THE STUDENT'S ABILITY TO IDENTIFY THE MOST APPROPRIATE SOLUTION TECHNIQUES AND TO PRESENT THE RESULTS CLEARLY AND EFFECTIVELY. THE COURSE INCLUDES A LAB DEVOTED TO DEVELOPING A PROJECT USING EMBEDDED ARCHITECTURE SIMULATION SYSTEMS AND TESTING THEM ON SOM AND SOC PLATFORMS. |
| Verification of learning | |
|---|---|
| THE EXAM FOR ATTENDING STUDENTS INVOLVES TAKING AN INTRACOURSE TEST WITH EXEMPTION VALUE AND THE DEVELOPMENT OF AN EXAM PROJECT RELATED TO THE EMBEDDED SYSTEMS LABORATORY. THE INTRACOURSE TEST INVOLVES THE DEVELOPMENT OF 3 EXERCISES: ONE DESIGNED TO TEST SKILLS RELATED TO THE SYNTHESIS OF SEQUENTIAL NETWORKS; ONE DEDICATED TO THE STUDY OF THE PERFORMANCE OF A PROCESSING SYSTEM; AND ONE RELATED TO THE DATAPATH OF A MICROPROCESSOR. EACH EXERCISE IS ASSESSED IN THIRTIETHS AND THE OVERALL VOTE IS GIVEN BY THE AVERAGE OF THE THREE PARTIAL RESULTS. A PASSING GRADE MUST BE ACHIEVED IN AT LEAST TWO EXERCISES TO PASS THE TEST. THE RELATIVE WEIGHT OF THE INTRACOURSE TEST ON THE FINAL EXAM IS 40%. THE FINAL EXAM CONSISTS OF AN ORAL PRESENTATION OF THE EXAM PROJECT DEVELOPED DURING THE EMBEDDED SYSTEMS LAB. MORE IN DETAIL, THE ORAL EXAMINATION CONSISTS OF TWO QUESTIONS: THE FIRST ONE CONCERNING THE REALIZED PROJECT (EXAMPLE: GENERAL DESCRIPTION, RESULTS ACHIEVED, METHODS USED AND IMPLEMENTATION SOLUTIONS CHOSEN FOR SPECIFIC SECTIONS OF THE PROJECT) AND THE SECOND ON ONE OF THE TOPICS COVERED DURING THE LECTURES AND NOT INCLUDED IN THE INTRACOURSE TEST (EXAMPLE: PIPELINED ARCHITECTURE; MEMORIES, I/O SYSTEMS). FOR THE EXAM TO BE PASSED, A SUFFICIENCY MUST BE ACHIEVED BOTH IN THE VERIFICATION OF LEARNING OF THE TOPICS COVERED IN THE THEORY HOURS AND IN THE VERIFICATION (IMPLEMENTATION AND ABILITY TO DESCRIPTION) OF THE ASSIGNED LABORATORY PROJECT. THE ASSESSMENT IS MADE IN THIRTIETHS, AND SUFFICIENCY IS ACHIEVED WITH EIGHTEEN THIRTIETHS. THE STUDENT REACHES THE LEVEL OF SUFFICIENCY IF HE/SHE DEMONSTRATES ADEQUATE COMPETENCE AND EXPRESSIVE ABILITY ON THE TOPICS COVERED. THE STUDENT ACHIEVES THE LEVEL OF EXCELLENCE IF HE/SHE DEMONSTRATES THE ABILITY TO MAKE COHERENT CONNECTIONS AMONG THE DIFFERENT THEORETICAL TOPICS COVERED AND DEMONSTRATE FULL MASTERY OVER THE ACTIVITIES CARRIED OUT DURING THE PROJECT LABORATORY CARRIED OUT. THE FINAL EXAM GRADE IS THE WEIGHTED AVERAGE (40-60) OF THE INTRACOURSE TEST AND THE FINAL EXAM. IN THE CASE OF FAILING THE INTRACOURSE TEST, THE STUDENT WILL BE ELIGIBLE FOR THE FINAL EXAM AFTER PASSING A WRITTEN TEST ORGANIZED IN THE SAME PATTERN AS DESCRIBED FOR THE INTRACOURSE TEST AND GRADED IN THE SAME MANNER. THE EXAMINATION FOR NON-ATTENDERS INVOLVES THE CONDUCT OF A WRITTEN AND AN ORAL TEST. TO ENTER THE ORAL EXAMINATION, ONE MUST PASS THE WRITTEN TEST WITH A MINIMUM GRADE OF 18/30. - THE WRITTEN IS AIMED AT ASSESSING OPERATIONAL SKILLS IN SEQUENTIAL MACHINE DESIGN AND IMPLEMENTATION, AND HW/SW RELATIONSHIP MANAGEMENT, HAVING THE MIPS PROCESSOR AS A USE CASE. - THE ORAL TEST IS AIMED AT DEEPENING THE STUDENT'S LEVEL OF KNOWLEDGE, AUTONOMY OF ANALYSIS AND JUDGMENT, AND EXPOSITORY SKILLS. IT CONSISTS OF A DISCUSSION OF THE WRITTEN PROOF AND TWO QUESTIONS: ONE TYPICALLY CONCERNING THE ARCHITECTURE OF THE MIPS MACHINE AND ONE TYPICALLY CONCERNING MEMORY HIERARCHY, I/O SYSTEMS, OR THE ORGANIZATION OF HIGH-PARALLEL COMPUTERS. THE EVALUATION OF THE TESTS TAKES INTO ACCOUNT THE EFFICIENCY OF THE METHODS USED, THE COMPLETENESS AND ACCURACY OF THE ANSWERS, AND THE CLARITY OF PRESENTATION. THE FINAL GRADE, EXPRESSED IN THIRTIETHS WITH POSSIBLE HONORS, TAKES INTO ACCOUNT THE OUTCOME OF THE TWO TESTS. THE STUDENT REACHES SUFFICIENCY LEVEL IF HE/SHE DEMONSTRATES ADEQUATE COMPETENCE AND EXPRESSIVE ABILITY ON THE TOPICS COVERED. THE STUDENT REACHES THE LEVEL OF EXCELLENCE IF HE/SHE DEMONSTRATES THE ABILITY TO MAKE COHERENT CONNECTIONS BETWEEN THE DIFFERENT THEORETICAL TOPICS COVERED AND DEMONSTRATE FULL MASTERY OF THE EXERCISE PART. |
| Texts | |
|---|---|
| PATTERSON AND HENNESSY, STRUTTURA E PROGETTO DEI CALCOLATORI, QUINTA EDIZIONE, ZANICHELLI EDITORE, 2022 |
| More Information | |
|---|---|
| LESSON LECTURES ALSO CONTAINING INTEGRATIVE TEACHING MATERIALS WILL BE PROVIDED BY THE LECTURER DURING THE COURSE USING OFFICIAL E-LEARNING PLATFORMS. NON-ATTENDEES ARE INVITED TO CONTACT THE LECTURER TO ARRANGE THE PROGRAM RESERVED FOR THEM, WHICH WILL NOT INCLUDE THE PROJECT TEST. THE LANGUAGE OF DELIVERY OF THE COURSE IS ITALIAN. |
BETA VERSION Data source ESSE3 [Ultima Sincronizzazione: 2025-10-07]
