Gennaro PERCANNELLA | Computer Architectures

cod. 0622700004

COMPUTER ARCHITECTURES

	0622700004
	DIPARTIMENTO DI INGEGNERIA DELL'INFORMAZIONE ED ELETTRICA E MATEMATICA APPLICATA
	EQF7
	COMPUTER ENGINEERING
	2017/2018

CURRICULUM INFORMATICA INDUSTRIALE

	OBBLIGATORIO
	YEAR OF COURSE 1
	YEAR OF DIDACTIC SYSTEM 2017
	PRIMO SEMESTRE

TEACHING UNITS

SSD	CFU	HOURS	ACTIVITY	TYPE OF ACTIVITY
ING-INF/05	5	40	LESSONS	COMPULSORY SUBJECTS, CHARACTERISTIC OF THE CLASS
ING-INF/05	1	8	EXERCISES	COMPULSORY SUBJECTS, CHARACTERISTIC OF THE CLASS
ING-INF/05	3	24	LAB	COMPULSORY SUBJECTS, CHARACTERISTIC OF THE CLASS

PROFESSORS

	ANGELO MARCELLI T Curriculum
	GENNARO PERCANNELLA Curriculum

	Objectives
	The course introduces the advanced architectural features developed for improving computer performance. The different solutions adopted in commercially available processors are systematically compared in terms of the cost/benefit ratio. The cost/benefit analysis is also adopted for illustrating the fundaments of capacity planning. Knowledge and understanding Understanding computer architecture advanced features, hardware/software interface, architectural features for the OS, architectural solution vs. performance. Methodological issues in capacity planning. Applying knowledge and understanding Functional design of advanced computer architecture and quantitative evaluation of different solutions on the system performance. Computer system capacity planning.

The course introduces the advanced architectural features developed for improving computer performance. The different solutions adopted in commercially available processors are systematically compared in terms of the cost/benefit ratio. The cost/benefit analysis is also adopted for illustrating the fundaments of capacity planning.

Knowledge and understanding
Understanding computer architecture advanced features, hardware/software interface, architectural features for the OS, architectural solution vs. performance. Methodological issues in capacity planning.

Applying knowledge and understanding
Functional design of advanced computer architecture and quantitative evaluation of different solutions on the system performance. Computer system capacity planning.

	Prerequisites
	COMPUTER ORGANIZATION, PERFORMANCE PARAMETER FOR CPU, MEMORY AND I/O, DIGITAL LOGIC DESIGN

	Contents
	INTRODUCTION (LECTURE: 2H) COMPUTER SYSTEM PERFORMANCE EVALUATION - COMPUTATIONAL COMPLEXITY AND COMPUTER SYSTEM ARCHITECTURE - REDUNDANCY AND PARALLELISM PIPELINE (LECTURE: 6H; RECITATION: 0H) PERFORMANCE - PIPELINED EXECUTION - HAZARDS - BRANCH PREDICTION - INTERRUPT AND EXCEPTION - PIPELINE WITH MULTI-CYCLE UNITS - HAZARDS IN MULTI-CYCLE PIPELINE MEMORY MANAGEMENT (LECTURE: 4H; RECITATION: 0H) CACHE: MAPPING, REPLACEMENT, COHERENCE, PERFORMANCE - VIRTUAL MEMORY: PAGING AND SEGMENTATION, PAGES AND SEGMENTS MANAGEMENT, REPLACEMENT, PAGE TABLE AND TLB, PERFORMANCE - MEMORY MANAGEMENT UNIT CPU ARCHITECTURE (LECTURE: 4H; RECITATION: 0H) SUPERSCALAR PROCESSORS - OUT-OF-ORDER EXECUTION: INSTRUCTION COMPLETION - REORDERING BUFFER - HISTORY BUFFER MULTIPROCESSOR SYSTEMS (LECTURE: 4H) HISTORY - MULTICORE ARCHITECTURES - CLOUD COMPUTING DATA PROCESSING SYSTEMS (LECTURE: 16H; RECITATION: 8H) LIFE CYCLE - CAPACITY PLANNING- METHODS AND TOOLS FOR PERFORMANCE ENGINEERING: MARKOV MODELS, QUEUES NETWORK - CASE STUDIES FINAL PROJECT (LAB: 30H) DEVELOPMENT, DOCUMENTATION AND FINAL PRESENTATION

Contents

INTRODUCTION
(LECTURE: 2H)
COMPUTER SYSTEM PERFORMANCE EVALUATION - COMPUTATIONAL COMPLEXITY AND COMPUTER SYSTEM ARCHITECTURE - REDUNDANCY AND PARALLELISM
PIPELINE
(LECTURE: 6H; RECITATION: 0H)
PERFORMANCE - PIPELINED EXECUTION - HAZARDS - BRANCH PREDICTION - INTERRUPT AND EXCEPTION - PIPELINE WITH MULTI-CYCLE UNITS - HAZARDS IN MULTI-CYCLE PIPELINE
MEMORY MANAGEMENT
(LECTURE: 4H; RECITATION: 0H)
CACHE: MAPPING, REPLACEMENT, COHERENCE, PERFORMANCE - VIRTUAL MEMORY: PAGING AND SEGMENTATION, PAGES AND SEGMENTS MANAGEMENT, REPLACEMENT, PAGE TABLE AND TLB, PERFORMANCE - MEMORY MANAGEMENT UNIT
CPU ARCHITECTURE
(LECTURE: 4H; RECITATION: 0H)
SUPERSCALAR PROCESSORS - OUT-OF-ORDER EXECUTION: INSTRUCTION COMPLETION - REORDERING BUFFER - HISTORY BUFFER
MULTIPROCESSOR SYSTEMS
(LECTURE: 4H)
HISTORY - MULTICORE ARCHITECTURES - CLOUD COMPUTING
DATA PROCESSING SYSTEMS
(LECTURE: 16H; RECITATION: 8H)
LIFE CYCLE - CAPACITY PLANNING- METHODS AND TOOLS FOR PERFORMANCE ENGINEERING: MARKOV MODELS, QUEUES NETWORK - CASE STUDIES
FINAL PROJECT
(LAB: 30H)
DEVELOPMENT, DOCUMENTATION AND FINAL PRESENTATION

	Teaching Methods
	THE COURSE INCLUDES LECTURES, RECITATIONS AND SUPERVISING OF THE STUDENTS DESIGN ACTIVITY. LECTURES ARE AIMED AT INRTRODUCING AND DISCUSSING THE REFERENCE MODELS, THEIR POSSIBLE IMPLEMENTATIONS AND THE QUANTITATIVE EVALUATION OF THEIR EFFECTS ON THE PERFORMANCE. DURING RECITATIONS, STUDENTS ARE GIVEN PROBLEMS AND/OR CASE STUDIES TO SOLVE AND THEIR SOLUTIONS ARE DISCUSSED AND COMMENTED. IN DESIGN ACTIVITIES, STUDENT TEAMS ARE ASSIGNED A PROJECT THAT IS INSTRUMENTAL FOR PROVIDING THE STUDENT WITH THE SKILL FOR APPLYING THE ACQUIRED KNOWLEDGE AS WELL AS FOR TEAMWORKING AND WRITTEN AND ORAL COMMUNICATION.

Teaching Methods

THE COURSE INCLUDES LECTURES, RECITATIONS AND SUPERVISING OF THE STUDENTS DESIGN ACTIVITY.
LECTURES ARE AIMED AT INRTRODUCING AND DISCUSSING THE REFERENCE MODELS, THEIR POSSIBLE IMPLEMENTATIONS AND THE QUANTITATIVE EVALUATION OF THEIR EFFECTS ON THE PERFORMANCE.
DURING RECITATIONS, STUDENTS ARE GIVEN PROBLEMS AND/OR CASE STUDIES TO SOLVE AND THEIR SOLUTIONS ARE DISCUSSED AND COMMENTED.
IN DESIGN ACTIVITIES, STUDENT TEAMS ARE ASSIGNED A PROJECT THAT IS INSTRUMENTAL FOR PROVIDING THE STUDENT WITH THE SKILL FOR APPLYING THE ACQUIRED KNOWLEDGE AS WELL AS FOR TEAMWORKING AND WRITTEN AND ORAL COMMUNICATION.

	Verification of learning
	THE FINAL EVALUATION IS BY A WRITTEN TEST AND AN ORAL EXAMINATION. THE WRITTEN TEST IS RELATIVE TO THE THE TOPIC OF PERFORMANCE ENGINEERING AND ITS MODALITIES CAN BE CHOSEN BY THE STUDENT BETWEEN TWO ALTERNATIVES: 1) THE STUDENT IS REQUIRED TO SOLVE PROBLEMS WHOSE TYPE AND COMPLEXITY IS SIMILAR TO THOSE OF THE EXERCISES REPORTED AT THE END OF CHAPTERS 1-4, 11-13 OF THE TEXTBOOK. THIS TEST MODALITY IS INDIVIDUAL. 2) THE STUDENT IS REQUIRED TO WRITE A REPORT ON A CASE STUDY BASED ON REAL DATA PROPOSED BY THE INSTRUCTOR OR BY THE STUDENT STUDENT. THIS TEST MODALITY CAN BE CARRIED OUT INDIVIDUALLY OR IN A GROUP WITH A COMPOSITION OF UP TO 4 PEOPLE. THE ORAL EXAMINATION FOCUSES ON DISCUSSING THE CONTENT OF THE WRITTEN TEST AND THE PRESENTATION OF THE PROPOSED DESIGN. THE GRADE IS THE WEIGHTED SUM OF WRITTEN TEST/DESIGN(70%), TEST DISCUSSION AND PROJECT PRESENTATION (10%) AND ORAL EXAMINATION (20%) . PRESENTATION AND SLIDES OF THE DESIGN MUST BE IN ENGLISH

Verification of learning

THE FINAL EVALUATION IS BY A WRITTEN TEST AND AN ORAL EXAMINATION.
THE WRITTEN TEST IS RELATIVE TO THE THE TOPIC OF PERFORMANCE ENGINEERING AND ITS MODALITIES CAN BE CHOSEN BY THE STUDENT BETWEEN TWO ALTERNATIVES:
1) THE STUDENT IS REQUIRED TO SOLVE PROBLEMS WHOSE TYPE AND COMPLEXITY IS SIMILAR TO THOSE OF THE EXERCISES REPORTED AT THE END OF CHAPTERS 1-4, 11-13 OF THE TEXTBOOK. THIS TEST MODALITY IS INDIVIDUAL.

2) THE STUDENT IS REQUIRED TO WRITE A REPORT ON A CASE STUDY BASED ON REAL DATA PROPOSED BY THE INSTRUCTOR OR BY THE STUDENT STUDENT. THIS TEST MODALITY CAN BE CARRIED OUT INDIVIDUALLY OR IN A GROUP WITH A COMPOSITION OF UP TO 4 PEOPLE.
THE ORAL EXAMINATION FOCUSES ON DISCUSSING THE CONTENT OF THE WRITTEN TEST AND THE PRESENTATION OF THE PROPOSED DESIGN.
THE GRADE IS THE WEIGHTED SUM OF WRITTEN TEST/DESIGN(70%), TEST DISCUSSION AND PROJECT PRESENTATION (10%) AND ORAL EXAMINATION (20%) .

PRESENTATION AND SLIDES OF THE DESIGN MUST BE IN ENGLISH

	Texts
	D.A. PATTERSON, J.L. HENNESSY, COMPUTER ORGANIZATION AND DESIGN: HARDWARE/SOFTWARE INTERFACE, ELSEVIER, 4TH EDITION, 2009 D. A. MENASCÈ. V. A. F. ALMEIDA, L. W. DOWDY: “PERFORMANCE BY DESIGN: COMPUTER CAPACITY PLANNING BY EXAMPLE”, PRENTICE HALL PTR, 2004.

	More Information
	LECTURES, RECITATION AND DESIGN ACTIVITIES ARE IN ENGLISH, EXCEPT THOSE ON LARGE COMPUTER SYSTEMS THAT ARE IN ITALIAN. ADDITIONAL MATERIAL WILL BE AVAILABLE AVAILABLE ON THE COURSE WEBSITE

BETA VERSION Data source ESSE3 [Ultima Sincronizzazione: 2019-05-14]

Gennaro PERCANNELLA | Computer Architectures